Error erasing sector 0

[Aroyer]

Ok problem came back again, so i'm starting to believe it a memory not cleared somewhere, because when I got it once, it does not work until I reset my PC 
This time I also get STLINK_SWD_AP_WDATA_ERROR and follow the STLINK_SWD_STICKY_ERROR

For the occurence, i can have 10 perfect debug session then.. it fail... and it hard to get it back.

NOTE(s) I just did a erase with "EBLink.exe -I stlink - F erase" and it seem to unlock the bit... maybe just coincidence. 
I have tried to make OPENOCD work but don't get the available option in the selection menu. (never use it so, dummy with it)

Multiple board, multiple probe... so not the hardware..


Thank you for your help... I'm big fan of Embitz from the beginning!!!


info mem :

Using memory regions provided by the target.
Num Enb Low Addr  High Addr  Attrs
0  y  0x00000000 0x00080000 ro nocache
1  y  0x08000000 0x08080000 flash blocksize 0x800 nocache
2  y  0x20000000 0x20020000 rw nocache
3  y  0x40000000 0x5fffffff rw nocache
4  y  0xe0000000 0xffffffff rw nocache
done



STM32G0B1RE for reference here my LD file and startup.S:

Code:

/* Entry Point */
ENTRY(Reset_Handler)

/* Highest address of the user mode stack */
_estack = 0x2001FFFF;           /* end of RAM */

/* Generate a link error if heap and stack don't fit into RAM */
_Min_Heap_Size  = 0x800;        /* required amount of heap  */
_Min_Stack_Size = 0x400;        /* required amount of stack */


OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
SEARCH_DIR(.)

/* Memory Spaces Definitions */
MEMORY
{
    ROM  (rx) : ORIGIN = 0x08000000, LENGTH = 256K
    RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 128K
}

/* Linker script to place sections and symbol values. Should be used together
* with other linker script that defines memory regions FLASH and RAM.
* It references following symbols, which must be defined in code:
*   Reset_Handler : Entry of reset handler
*
* It defines following symbols, which code can use without definition:
*   __exidx_start
*   __exidx_end
*   __etext
*   __data_start__
*   __preinit_array_start
*   __preinit_array_end
*   __init_array_start
*   __init_array_end
*   __fini_array_start
*   __fini_array_end
*   __data_end__
*   __bss_start__
*   __bss_end__
*   __end__
*   end
*   __HeapLimit
*   __StackLimit
*   __StackTop
*   __stack
*/


SECTIONS
{
    .text :
    {
        KEEP(*(.isr_vector))
        *(.text*)

        KEEP(*(.init))
        KEEP(*(.fini))

        /* .ctors */
        *crtbegin.o(.ctors)
        *crtbegin?.o(.ctors)
        *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
        *(SORT(.ctors.*))
        *(.ctors)

        /* .dtors */
        *crtbegin.o(.dtors)
        *crtbegin?.o(.dtors)
        *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
        *(SORT(.dtors.*))
        *(.dtors)

        _sidata = .;
        *(.rodata*)

        KEEP(*(.eh_frame*))
    } > ROM

    .ARM.extab :
    {
        *(.ARM.extab* .gnu.linkonce.armextab.*)
    } > ROM

    __exidx_start = .;
    .ARM.exidx :
    {
        *(.ARM.exidx* .gnu.linkonce.armexidx.*)
    } > ROM
    __exidx_end = .;

    __etext = .;

    .data : AT (__etext)
    {
        __data_start__ = .;
        _sdata = .;
        *(vtable)
        *(.data*)

        . = ALIGN(4);
        /* preinit data */
        PROVIDE_HIDDEN (__preinit_array_start = .);
        KEEP(*(.preinit_array))
        PROVIDE_HIDDEN (__preinit_array_end = .);

        . = ALIGN(4);
        /* init data */
        PROVIDE_HIDDEN (__init_array_start = .);
        KEEP(*(SORT(.init_array.*)))
        KEEP(*(.init_array))
        PROVIDE_HIDDEN (__init_array_end = .);


        . = ALIGN(4);
        /* finit data */
        PROVIDE_HIDDEN (__fini_array_start = .);
        KEEP(*(SORT(.fini_array.*)))
        KEEP(*(.fini_array))
        PROVIDE_HIDDEN (__fini_array_end = .);

        . = ALIGN(4);
        /* All data end */
        __data_end__ = .;
        _edata = .;

    } > RAM

    .bss (NOLOAD):
    {
        __bss_start__ = .;
        _sbss = .;
        *(.bss*)
        *(COMMON)
        __bss_end__ = .;
        _ebss = .;
    } > RAM

    .heap (NOLOAD):
    {
        __end__ = .;
        end = __end__;
        *(.heap*)
        __HeapLimit = .;
    } > RAM

    /* .stack_dummy section doesn't contains any symbols. It is only
     * used for linker to calculate size of stack sections, and assign
     * values to stack symbols later */
    .stack_dummy (NOLOAD):
    {
        *(.stack)
    } > RAM

    /* Set stack top to end of RAM, and stack limit move down by
     * size of stack_dummy section */
    __StackTop = ORIGIN(RAM) + LENGTH(RAM);
    __StackLimit = __StackTop - SIZEOF(.stack_dummy);
    PROVIDE(__stack = __StackTop);
    PROVIDE(_estack = __StackTop);

    /* Check if data + heap + stack exceeds RAM limit */
    ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
}

    .syntax unified
    .arch armv6-m
    .cpu cortex-m0plus
    .fpu softvfp
    .thumb

    .section .stack
    .align 3
#ifdef __STACK_SIZE
    .equ    Stack_Size, __STACK_SIZE
#else
    .equ    Stack_Size, 0x400
#endif
    .globl    __StackTop
    .globl    __StackLimit
__StackLimit:
    .space    Stack_Size
    .size __StackLimit, . - __StackLimit
__StackTop:
    .size __StackTop, . - __StackTop

    .section .heap
    .align 3
#ifdef __HEAP_SIZE
    .equ    Heap_Size, __HEAP_SIZE
#else
    .equ    Heap_Size, 0xC00
#endif
    .globl    __HeapBase
    .globl    __HeapLimit
__HeapBase:
    .if    Heap_Size
    .space    Heap_Size
    .endif
    .size __HeapBase, . - __HeapBase
__HeapLimit:
    .size __HeapLimit, . - __HeapLimit

    .section .isr_vector
    .align 2
    .globl __isr_vector
__isr_vector:

    .long _estack
    .long Reset_Handler
    .long NMI_Handler
    .long HardFault_Handler
    .long 0
    .long 0
    .long 0
    .long 0
    .long 0
    .long 0
    .long 0
    .long SVC_Handler
    .long 0
    .long 0
    .long PendSV_Handler
    .long SysTick_Handler

    // External Interrupts
    .long WWDG_IRQHandler                              // Window WatchDog
    .long PVD_VDDIO2_IRQHandler                        // PVD through EXTI Line detect
    .long RTC_TAMP_IRQHandler                          // RTC through the EXTI line
    .long FLASH_IRQHandler                              // FLASH
    .long RCC_CRS_IRQHandler                            // RCC & CRS
    .long EXTI0_1_IRQHandler                            // EXTI Line 0 and 1
    .long EXTI2_3_IRQHandler                            // EXTI Line 2 and 3
    .long EXTI4_15_IRQHandler                          // EXTI Line 4 to 15
    .long USB_UCPD1_2_IRQHandler                        // USB, UCPD1, UCPD2
    .long DMA1_Channel1_IRQHandler                      // DMA1 Channel 1
    .long DMA1_Channel2_3_IRQHandler                    // DMA1 Channel 2 and Channel 3
    .long DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX1_OVR_IRQHandler  // DMA1 Ch4 to Ch7, DMA2 Ch1 to Ch5, DMAMUX1 overrun
    .long ADC1_COMP_IRQHandler                          // ADC1, COMP1 and COMP2
    .long TIM1_BRK_UP_TRG_COM_IRQHandler                // TIM1 Break, Update, Trigger and Commutation
    .long TIM1_CC_IRQHandler                            // TIM1 Capture Compare
    .long TIM2_IRQHandler                              // TIM2
    .long TIM3_TIM4_IRQHandler                          // TIM3, TIM4
    .long TIM6_DAC_LPTIM1_IRQHandler                    // TIM6, DAC and LPTIM1
    .long TIM7_LPTIM2_IRQHandler                        // TIM7 and LPTIM2
    .long TIM14_IRQHandler                              // TIM14
    .long TIM15_IRQHandler                              // TIM15
    .long TIM16_FDCAN_IT0_IRQHandler                    // TIM16 & FDCAN1_IT0 & FDCAN2_IT0
    .long TIM17_FDCAN_IT1_IRQHandler                    // TIM17 & FDCAN1_IT1 & FDCAN2_IT1
    .long I2C1_IRQHandler                              // I2C1
    .long I2C2_3_IRQHandler                            // I2C2, I2C3
    .long SPI1_IRQHandler                              // SPI1
    .long SPI2_3_IRQHandler                            // SPI2, SPI3
    .long USART1_IRQHandler                            // USART1
    .long USART2_LPUART2_IRQHandler                    // USART2 & LPUART2
    .long USART3_4_5_6_LPUART1_IRQHandler              // USART3, USART4, USART5, USART6, LPUART1
    .long CEC_IRQHandler                                // CEC
    .size    __isr_vector, . - __isr_vector

    .text
    .thumb
    .thumb_func
    .align 2
    .globl    Reset_Handler
    .type    Reset_Handler, %function
Reset_Handler:
/*    Loop to copy data from read only memory to RAM. The ranges
*      of copy from/to are specified by following symbols evaluated in
*      linker script.
*      __etext: End of code section, i.e., begin of data sections to copy from.
*      __data_start__/__data_end__: RAM address range that data should be
*      copied to. Both must be aligned to 4 bytes boundary.  */

    ldr    r1, =__etext
    ldr    r2, =__data_start__
    ldr    r3, =__data_end__


    subs    r3, r2
    ble    .flash_to_ram_loop_end
.flash_to_ram_loop:
    subs    r3, #4
    ldr    r0, [r1, r3]
    str    r0, [r2, r3]
    bgt    .flash_to_ram_loop
.flash_to_ram_loop_end:


#ifndef __NO_SYSTEM_INIT
    ldr    r0, =HALCLK_Initialize
    blx    r0
#endif

    ldr    r0, =_start
    bx    r0
    .pool
    .size Reset_Handler, . - Reset_Handler

/* Our weak _start alternative if we don't use the library _start
* The zero init section must be cleared, otherwise the librtary is
* doing that */
    .align 1
    .thumb_func
    .weak _start
    .type _start, %function
_start:

    /* Zero fill the bss segment. */
    ldr  r1, = __bss_start__
    ldr  r2, = __bss_end__
    movs  r3, #0
    b  .fill_zero_bss
.loop_zero_bss:
    str  r3, [r1]
    adds  r1,#4

.fill_zero_bss:
    cmp  r1, r2
    bcc  .loop_zero_bss

    /* Jump to our main */
    bl main
    b .
    .size    _start, . - _start

/*    Macro to define default handlers. Default handler
*    will be weak symbol and just dead loops. They can be
*    overwritten by other handlers */
    .macro    def_irq_handler    handler_name
    .align 1
    .thumb_func
    .weak    \handler_name
    .type    \handler_name, %function
\handler_name :
    b    .
    .size    \handler_name, . - \handler_name
    .endm

    def_irq_handler    NMI_Handler
    def_irq_handler    HardFault_Handler
    def_irq_handler    SVC_Handler
    def_irq_handler    DebugMon_Handler
    def_irq_handler    PendSV_Handler
    def_irq_handler    SysTick_Handler

                // External Interrupts
    def_irq_handler    WWDG_IRQHandler
    def_irq_handler    PVD_VDDIO2_IRQHandler
    def_irq_handler    RTC_TAMP_IRQHandler
    def_irq_handler    FLASH_IRQHandler
    def_irq_handler    RCC_CRS_IRQHandler
    def_irq_handler    EXTI0_1_IRQHandler
    def_irq_handler    EXTI2_3_IRQHandler
    def_irq_handler    EXTI4_15_IRQHandler
    def_irq_handler    USB_UCPD1_2_IRQHandler
    def_irq_handler    DMA1_Channel1_IRQHandler
    def_irq_handler    DMA1_Channel2_3_IRQHandler
    def_irq_handler    DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX1_OVR_IRQHandler
    def_irq_handler    ADC1_COMP_IRQHandler
    def_irq_handler    TIM1_BRK_UP_TRG_COM_IRQHandler
    def_irq_handler    TIM1_CC_IRQHandler
    def_irq_handler    TIM2_IRQHandler
    def_irq_handler    TIM3_TIM4_IRQHandler
    def_irq_handler    TIM6_DAC_LPTIM1_IRQHandler
    def_irq_handler    TIM7_LPTIM2_IRQHandler
    def_irq_handler    TIM14_IRQHandler
    def_irq_handler    TIM15_IRQHandler
    def_irq_handler    TIM16_FDCAN_IT0_IRQHandler
    def_irq_handler    TIM17_FDCAN_IT1_IRQHandler
    def_irq_handler    I2C1_IRQHandler
    def_irq_handler    I2C2_3_IRQHandler
    def_irq_handler    SPI1_IRQHandler
    def_irq_handler    SPI2_3_IRQHandler
    def_irq_handler    USART1_IRQHandler
    def_irq_handler    USART2_LPUART2_IRQHandler
    def_irq_handler    USART3_4_5_6_LPUART1_IRQHandler
    def_irq_handler    CEC_IRQHandler

    .end

[Aroyer]

I just confirmed this

eblink.exe -I stlink -F erase

It help to remove the sticky bit...

[embitz]

I think that you have added that mcu id 0x467 yourself (which is exactly the purpose of scripting btw), could you put your scripts in a zip and share them?

If I should do a wild guess, I think that something goes wrong with e.g. the dualbank setting.

[Aroyer]

Well, currently in the flash script of the wx_l4_gx the hasDualBank flag is used in the sector erasing part for instance.

Adding a new device is basically reading the flash sequence parts of the reference manuals and compare the sequence together with the right registers addresses and register flags for all the possible scenarios.

Currently I'm busy with finalizing a  project but as soon as I have some time left I will see if I can find some differences.

Code:

  local eraseFlags = FLASH_CR_PER | FLASH_CR_STRT

        if(hasDualBank && (sector >= halfOfSectors) )
            eraseFlags  = eraseFlags | ( (sector-halfOfSectors)<< FLASH_CR_PAGE_SHIFT | FLASH_CR_BKER )
        else
            eraseFlags  = eraseFlags | (sector<< FLASH_CR_PAGE_SHIFT )

        // 1. Check that no Flash memory operation is ongoing by checking the BSY1 in the SR
        // (we already check that on the end of every flash action)

        // 2. Check and clear all error programming flags due to a previous programming. If not, PGSERR is set
        clear_flash_errors()

        // 3. Set the PER bit and select the page to erase (PNB) in the flash_cr
        // 4. Set the STRT bit of the flash_cr
        _n_throw( intrfApi.writeMem32(FLASH_BASE + FLASH_CR, eraseFlags ) )

[embitz]

Shit, somehow my reply is typed over your response. Sorry

[Aroyer]

I will try myself also as I'm starting to understand better the script as I go.
I'm also busy until next week!... I notice there is difference in the register and flag for the g0bx/cx.

example:
FLASH_CR_BKER is at the bit position 13 instead of bit 11.
there is FLASH_SR_BSY1 (bit 16) and FLASH_SR_BSY2 (bit 17) instead of only FLASH_SR_BSY at bit 16