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Kinetis MK66 & SVD - Printable Version

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Kinetis MK66 & SVD - Workalot - 13-12-2018

Detective Workalot is on the trail of the misbehaving Kinetis MK66 SVD file.

The attached 'mk66_svd_issue.txt' expresses findings.

(13-12-2018, 10:05 AM)Workalot Wrote: Detective Workalot is on the trail of the misbehaving Kinetis MK66 SVD file.

The attached 'mk66_svd_issue.txt' expresses findings.

Hmmm - where did the attachment get to?

Here is its content...

13-Dec-2018
-----------
Bogged down on why when debugging, the 'System Registers' window won't show
register values, reporting '(Target read error)'. However, some <peripheral>s
do show values.

For example the FTFE peripheral is reported (albeit incorrectly).

But some background. At...

    https://forum.segger.com/index.php/Thread/5823-SOLVED-JLink-JMEM-MK66F18-unable-to-read-peripheral-registers/

... I posed the question as to why peripheral registers could not be
viewed with JMEM. Well, JMEM reads in blocks and if there is a 'gap' in
the block addresses, the read fails. A 'gap' is an address where no
register exists.

Now I'm a wondering if this is the cause for '(Target read error)'. In the
case of FTFE peripheral, all registers are accessible including the reserved
registers. This was tested using the command line JLink utility...

    J-Link> mem8 0x40020000,0x2C    // Access entire space

... so, if one considers the SVD file for FTFE...

    <peripheral>
      <name>FTFE</name>
      <description>Flash Memory Interface</description>
      <prependToName>FTFE_</prependToName>
      <baseAddress>0x40020000</baseAddress>
      <addressBlock>
        <offset>0</offset>
        <size>0x2C</size>
        ......
     </peripheral>

... maybe '<size>0x2C</size>' has EmBitz instruct J-Link to read in 0x2C
bytes which is all good - there is no failure.

When we look at the PIT peripheral's layout however...

    /** PIT - Register Layout Typedef */
    typedef struct {
        __IO uint32_t MCR;
             uint8_t RESERVED_0[220];
        __I  uint32_t LTMR64H;
        __I  uint32_t LTMR64L;
             uint8_t RESERVED_1[24];
        struct {
            __IO uint32_t LDVAL;
            __I  uint32_t CVAL;
            __IO uint32_t TCTRL;
        __IO uint32_t TFLG;
        } CHANNEL[4];
    } PIT_Type;

... we find that a...

    J-Link>mem8 0x40037004,1    // PIT->RESERVED_0[0]

... fails with a 'Could not read memory'. So there is a 'gap' and the
read fails resulting in the PIT peripheral in the debug window showing
all '(Target read error)'s.

But, hang on, why does it not occur with other MCU platforms? EmBitz
is fine with SAM3X8E, STM32F407, LPC1837. Do they have contiguous
register space?


RE: Kinetis MK66 & SVD - Workalot - 16-12-2018

The subject advances a little. Over at https://community.nxp.com/message/1092218?commentID=1092218&et=watches.email.thread#comment-1092218 there is mention of holes and gaps in Kinetis peripheral registers.

Can there be any enlightenment from this forum on how one could have EmBitz what IAR does?